Test Access of TAP'ed & Non-TAP'ed Cores

Core reuse is an emerging IC design style which enables rapid development of highly complex ICs. Reusable circuit cores come in two basic varieties, hard and soft. Hard cores are optimized for area and performance and are not modifiable by the user, whereas soft cores are user modifiable. If soft cores do not contain testability (i.e. scan/BIST), it can be inserted into the core by the user. Hard cores cannot have test features inserted by the user. Hard core providers should therefore include some means of’testing the cores to prevent users from having to add testability external to the core, using pin access or scan/BIST collaring for example.